I've just committed the bits required to run a C program on the Marin SoC.
Rather than hook up the Nexys3 external RAM module, I'm using extra space on the FPGA itself for RAM. Most of the hard work was sorting out the linker script magic required to generate an …
Time for a quick update!
"Marin" is the name of my test SoC consisting of a wishbone wrapped 75Mhz big-endian MoxieLite bus master, along with two slave devices: embedded ROM and the Nexys3's 7-segment display. So, right now I can write some code into FPGA embedded ROM to manipulate the …
Brad Robinson just sent me this awesome shot of MoxieLite in action. His Xilinx Spartan-6 FPGA based SoC features a moxie core handling VGA video, keyboard and FAT-on-flash filesystem duties using custom firmware written in C. This is all in support of a second z80-based core on the same FPGA …
There's a working hardware implementation of moxie in the wild!
Intrepid hacker Brad Robinson created this moxie-compatible core as a peripheral controller for his SoC. He had been using a simple 8-bit core, but needed to address more memory than was possible with the 8-bit part. Moxie is a nice …
I picked up a lightly used FPGA development board from craigslist today. It's the Altera DE2 board with a Cyclone II FPGA.
There are a few nice things about this board...